View MAX3002E_925238.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

general description the max3000e/max3001e/max3002?ax3012 8- channel level translators provide the level shifting neces- sary to allow data transfer in a multivoltage system. externally applied voltages, v cc and v l , set the logic lev- els on either side of the device. logic signals present on the v l side of the device appear as a higher voltage logic signal on the v cc side of the device, and vice-versa. the max3000e/max3001e/max3002/max3004 max3012 use an architecture specifically designed to be bidirectional without the use of a directional pin. the max3000e/max3001e/max3002/max3004?ax3012 feature an en input that, when low, reduces the v cc and v l supply currents to <2?. the max3000e/max3001e also have ?5kv esd protection on the i/o v cc side for greater protection in applications that route signals externally. the max3000e operates at a guaranteed data rate of 230kbps. the max3001e operates at a guaranteed data rate of 4mbps. the max3002?ax3012 operate at a guaranteed data rate of 20mbps over the entire specified operating voltage range. the max3000e/max3001e/max3002?ax3012 accept v l voltages from +1.2v to +5.5v and v cc voltages from +1.65v to +5.5v, making them ideal for data transfer between low-voltage asics/plds and higher voltage systems. the max3000e/max3001e/max3002 max3012 are available in 20-pin ucsp and 20-pin tssop packages. applications cmos logic-level translation cellphones spi and microwire level translation low-voltage asic level translation smart card readers cellphone cradles portable pos systems portable communication devices low-cost serial interfaces gps telecommunications equipment features ? guaranteed data rate options 230kbps (max3000e) 4mbps (max3001e) 20mbps (max3002?ax3012) ? bidirectional level translation without using a direction pin (max3000e/max3001e/max3002/ max3003) ? unidirectional level translation (max3004?ax3012) ? operation down to +1.2v on v l ? ?5kv esd protection on i/o v cc lines (max3000e/max3001e) ? ultra-low 0.1? supply current in shutdown ? low quiescent current (<10?) ? ucsp and tssop packages max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators ________________________________________________________________ maxim integrated products 1 ordering information max3000e max3001e max3002 max3012 +1.8v +3.3v +1.8v system controller +3.3v system data data gnd v l v cc i/o v cc_ i/o v l_ en typical operating circuit 19-2672; rev 2; 1/05 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin-package max3000e eup -40? to +85? 20 tssop max3000eebp-t -40? to +85? 4 x 5 ucsp ucsp is a trademark of maxim integrated products, inc. spi is a trademark of motorola, inc. microwire is a trademark of national semiconductor. ordering information continued at end of data sheet. pin configurations and functional diagrams appear at end of data sheet.
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. all voltages referenced to gnd v cc ...........................................................................-0.3v to +6v v l........................................................................................... -0.3v to +6v i/o v cc_ ......................................................-0.3v to (v cc + 0.3v) i/o v l_ ...........................................................-0.3v to (v l + 0.3v) en, en a/b ...............................................................-0.3v to +6v short-circuit duration i/o v l_ , i/o v cc_ to gnd .......continuous continuous power dissipation (t a = +70 c) 20-pin tssop (derate 7.0mw/ c above +70 c) .........559mw 20-pin ucsp (derate 10mw/ c above +70 c) ............800mw operating temperature ranges max3001eaup .............................................-40 c to +125 c max300_ee_p .................................................-40 c to +85 c max30_ _e_p ..................................................-40 c to +85 c junction temperature ......................................................+150 c storage temperature range ............................-65 c to +150 c lead temperature (soldering, 10s) .................................+300 c electrical characteristics (v cc = +1.65v to +5.5v, v l = +1.2v to v cc , en = v l (max3000e/max3001e/max3002/max3004?ax3012), en a/b = v l or 0 (max3003), t a = t min to t max . typical values are at v cc = +1.65v, v l = +1.2v, and t a = +25?.) (notes 1, 2) parameter symbol conditions min typ max units power supplies v l supply range v l 1.2 v cc v v cc supply range v cc 1.65 5.50 v i/o v cc _ = 0, i/o v l _ = 0 or i/o v cc _ = v cc , i/o v l _ = v l , max3000e/max3002?ax3012 0.1 10 supply current from v cc i qvcc i/o v cc _ = 0, i/o v l _ = 0 or i/o v cc _ = v cc , i/o v l _ = v l , max3001e 0.1 50 ? i/o v cc _ = 0, i/o v l _ = 0 or i/o v cc _ = v cc , i/o v l _ = v l , max3000e/max3002?ax3012 0.1 10 supply current from v l i qvl i/o v cc _ = 0, i/o v l _ = 0 or i/o v cc _ = v cc , i/o v l _ = v l , max3001e 0.1 50 ? t a = +25 c, en = 0, max3000e/max3001e/max3002/ max3004?ax3012 0.1 2 v cc shutdown supply current i shdn-vcc t a = +25 c, en a/b = 0, max3003 0.1 2 ? t a = +25 c, en = 0, max3000e/max3001e/max3002/ max3004?ax3012 0.1 2 v l shutdown supply current i shdn-vl t a = +25 c, en a/b = 0, max3003 0.1 2 ?
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators _______________________________________________________________________________________ 3 electrical characteristics (continued) (v cc = +1.65v to +5.5v, v l = +1.2v to v cc , en = v l (max3000e/max3001e/max3002/max3004?ax3012), en a/b = v l or 0 (max3003), t a = t min to t max . typical values are at v cc = +1.65v, v l = +1.2v, and t a = +25?.) (notes 1, 2) parameter symbol conditions min typ max units t a = +25 c, en = 0, max3000e/max3001e/max3002/ max3004?ax3012 0.1 2 i/o v cc _ three-state output leakage current t a = +25 c, en a/b = 0, max3003 0.1 2 ? i/o v l _ three-state output leakage current en a/b = 0, max3003 0.1 2 a i/o v l _ pulldown resistance during shutdown en = 0, max3000e/max3001e/max3002/ max3004?ax3012 4.59 8.30 k ? e n or en a/b inp ut leakag e c ur rent t a = +25 c1a logic-level thresholds i/o v l _ input voltage high threshold v ihl 2/3 x v l v i/o v l _ input voltage low threshold v ill 1/3 x v cc v i/o v cc _ input voltage high threshold v ihc 2/3 x v cc v i/o v cc _ input voltage low threshold v ilc 1/3 x v cc v en, en a/b input voltage high threshold v ih v l - 0.4 v en, en a/b input voltage low threshold v il 0.4 v i/o v l _ output voltage high v ohl i/o v l _ source current = 20?, i/o v cc _ v cc - 0.4v v l - 0.4 v i/o v l _ output voltage low v oll i/o v l _ sink current = 20?, i/o v cc _ 0.4v 0.4 v i/o v cc _ output voltage high v ohc i/o v cc_ source current = 20?, i/o v l _ v l - 0.4v v cc - 0.4 v i/o v cc _ output voltage low v olc i/o v cc sink current = 20?, i/o v l _ 0.4v 0.4 v esd protection i/o v cc _ human body model, max3000e/max3001e ?5 kv
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators 4 _______________________________________________________________________________________ timing characteristics (v cc = +1.65v to +5.5v, v l = +1.2v to v cc , en = v l (max3000e/max3001e/max3002/max3004?ax3012), en a/b = v l or 0 (max3003), t a = t min to t max . typical values are at v cc = +1.65v, v l = +1.2v, and t a = +25?.) (notes 1, 2) parameter sym bo l conditions min typ max units r s = 50 ? , c vcc = 50p f, m ax 3000e , fi g ur es 1a, 1b 400 800 1200 r s = 50 ? , c vcc = 50p f, m ax 3001e , fi g ur es 1a, 1b 25 50 i/o v cc _ rise time t rvcc r s = 50 ? , c vcc = 50p f, m ax 3002m ax 3012, fi g ur es 1a, 1b 15 ns r s = 50 ? , c vcc = 50p f, m ax 3000e , fi g ur es 1a, 1b 400 800 1200 r s = 50 ? , c vcc = 50p f, m ax 3001e , fi g ur es 1a, 1b 25 50 i/o v cc _ fall time t fvcc r s = 50 ? , c vcc = 50p f, m ax 3002m ax 3012, fi g ur es 1a, 1b 15 ns r s = 50 ? , c vl = 50p f, m ax 3000e , fi g ur es 2a, 2b 400 800 1200 r s = 50 ? , c vl = 50p f, m ax 3001e , fi g ur es 2a, 2b 25 50 i/o v l _ rise time t rvl r s = 50 ? , c vl = 15p f, m ax 3002m ax 3012, fi g ur es 2a, 2b 15 ns r s = 50 ? , c vl = 50p f, m ax 3000e , fi g ur es 2a, 2b 400 800 1200 r s = 50 ? , c vl = 50p f, m ax 3001e , fi g ur es 2a, 2b 25 65 i/o v l _ fall time t fvl r s = 50 ? , c vl = 15p f, m ax 3002m ax 3012, fi g ur es 2a, 2b 15 ns r s = 50 ? , c vcc = 50p f, m ax 3000e , fi g ur es 1a, 1b 1000 r s = 50 ? , c vcc = 50p f, m ax 3001e , fi g ur es 1a, 1b 50 propagation delay (driving i/o v l _) i/o vl-vcc r s = 50 ? , c vcc = 50p f, m ax 3002m ax 3012, fi g ur es 1a, 1b 20 ns r s = 50 ? , c vl = 50p f, m ax 3000e , fi g ur es 2a, 2b 1000 r s = 50 ? , c vl = 50p f, m ax 3001e , fi g ur es 2a, 2b 50 propagation delay (driving i/o v cc _) i/o vcc-vl r s = 50 ? , c vl = 15p f, m ax 3002m ax 3012, fi g ur es 2a, 2b 20 ns note 1: all units are 100% production tested at t a = +25?. limits over the operating temperature range are guaranteed by design and not production tested. note 2: for normal operation, ensure that v l < v cc . during power-up, v l > v cc does not damage the device.
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators _______________________________________________________________________________________ 5 timing characteristics (continued) (v cc = +1.65v to +5.5v, v l = +1.2v to v cc , en = v l (max3000e/max3001e/max3002/max3004?ax3012), en a/b = v l or 0 (max3003), t a = t min to t max . typical values are at v cc = +1.65v, v l = +1.2v, and t a = +25?.) (notes 1, 2) parameter sym bo l conditions min typ max units r s = 50 ? , c vcc = 50p f, c vl = 50p f, m ax 3000e 500 r s = 50 ? , c vcc = 50p f, c vl = 50p f, m ax 3001e 10 channel-to-channel skew t skew r s = 50 ? , c vcc = 50p f, c vl = 15p f, m ax 3002m ax 3012 5 ns r s = 50 ? , c v c c = 50p f, c v l = 50p f, ? t a = + 20c , max3000e (n ote 3) 800 r s = 50 ? , c vcc = 50p f, c vl = 50p f, ? t a = + 20c , m ax 3001e ( n ote 3) 30 part-to-part skew t ppskew r s = 50 ? , c vcc = 50p f, c vl = 15p f, ? t a = + 20c , m ax 3002m ax 3012 ( n ote 3) 10 ns propagation delay from i/o v l _ to i/o v cc_ after en t en - vcc c vcc = 50p f, m ax 3000e /m ax 3001e , m ax 3002m ax 3012, fi g ur e 3 ? c vl = 50p f, m ax 3000e /m ax 3001e / m ax 3002/m ax 3004m ax 3012, fi g ur e 4 2 propagation delay from i/o v cc_ to i/o v l _ after en t en - vl c vl = 15p f, m ax 3003, fi g ur e 4 2 ? r s = 50 ? , c vcc = 50p f, c vl = 50p f, m ax 3000e 230 kbps r s = 50 ? , c vcc = 50p f, c vl = 50p f, m ax 3001e 4 maximum data rate r s = 50 ? , c vcc = 50p f, c vl = 15p f, m ax 3002m ax 3012 20 mbps note 3: v cc from device 1 must equal v cc of device 2; v l from device 1 must equal v l of device 2.
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators 6 _______________________________________________________________________________________ timing characteristics?ax3002?ax3012 (v cc = +1.65v to +5.5v, v l = +1.2v to v cc , en = v l (max3002/max3004?ax3012), en a/b = v l or 0 (max3003), t a = t min to t max. ) (notes 1, 2) parameter sym b o l conditions min typ max units +1.2v v l v cc +3.3v i/o v cc _ rise time t rvcc 15 ns i/o v cc _ fall time t fvcc 15 ns i/o v l _ rise time t rvl 15 ns i/o v l _ fall time t fvl 15 ns i/o vl-vcc driving i/o v l _15 propagation delay i/o vcc-vl driving i/o v cc _15 ns channel-to-channel skew t skew each translator equally loaded 5ns maximum data rate 20 mbps +2.5v v l v cc +3.3v i/o v cc _ rise time t rvcc 8.5 ns i/o v cc _ fall time t fvcc 8.5 ns i/o v l _ rise time t rvl 8.5 ns i/o v l _ fall time t fvl 8.5 ns i/o vl-vcc driving i/o v l _ 8.5 propagation delay i/o vcc-vl driving i/o v cc _ 8.5 ns channel-to-channel skew t skew each translator equally loaded 10 ns maximum data rate 35 mbps +1.8v v l v cc +2.5v i/o v cc _ rise time t rvcc 10 ns i/o v cc _ fall time t fvcc 10 ns i/o v l _ rise time t rvl 10 ns i/o v l _ fall time t fvl 10 ns i/o vl-vcc driving i/o v l _15 propagation delay i/o vcc-vl driving i/o v cc _10 ns channel-to-channel skew t skew each translator equally loaded 5 ns maximum data rate 30 mbps
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators _______________________________________________________________________________________ 7 typical operating characteristics (t a = +25?, unless otherwise noted.) 2000 1500 1000 500 0 -40 10 -15 35 60 85 max3000e/01e/02-12 toc03 temperature ( c) v l supply current ( a) v l supply current vs. temperature (driving i/o v cc , v cc = 3.3v, v l = 1.8v) data rate = 20mbps data rate = 4mbps data rate = 230kbps 0 2000 6000 4000 8000 10,000 1.5 2.5 3.0 2.0 3.5 4.0 4.5 5.0 5.5 max3000e/01e/02-12 toc02 supply voltage (v) v cc supply current ( a) v cc supply current vs. supply voltage (driving i/o v l , v l = 1.8v) data rate = 230kbps data rate = 4mbps data rate = 20mbps 0 100 200 300 400 500 600 1.5 2.5 2.0 3.0 3.5 4.0 4.5 5.0 5.5 v l supply current vs. supply voltage (driving i/o v l , v l = 1.8v) max3000e/01e/02-12 toc01 supply voltage (v) v l supply current ( a) data rate = 20mbps data rate = 4mbps data rate = 230kbps 0 500 1500 1000 2000 2500 -40 10 -15 35 60 85 max3000e/01e/02-12 toc04 temperature ( c) v cc supply current ( a) v cc supply current vs. temperature (driving i/o v cc , v cc = 3.3v, v l = 1.8v) data rate = 20mbps data rate = 4mbps data rate = 230kbps 0 20 40 60 80 100 10 40 50 20 30 60 70 80 90 100 max3000e/01e/02-12 toc05 capacitive load (pf) v l supply current ( a) v l supply current vs. capacitive load on i/o v cc (driving i/o v l , v cc = 3.3v, v l = 1.8v) data rate = 20mbps data rate = 4mbps data rate = 230kbps 0 2000 1000 4000 3000 6000 5000 7000 10 30 40 20 50 60 70 80 90 100 max3000e/01e/02-12 toc06 capacitive load (pf) v cc supply current ( a) v cc supply current vs. capacitive load on i/o v cc (driving i/o v l , v cc = 3.3v, v l = 1.8v) data rate = 20mbps data rate = 4mbps data rate = 230kbps max3000e/01e/02-12 toc07 capacitive load (pf) rise/fall time (ns) 90 80 70 60 50 40 30 20 500 1000 1500 2000 0 10 100 t hl max3000e rise/fall time vs. capacitive load on i/o v cc (driving i/o v l , v cc = 3.3v, v l = 1.8v) data rate = 230kbps t lh
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators 8 _______________________________________________________________________________________ typical operating characteristics (continued) (t a = +25?, unless otherwise noted.) 0 10 20 30 40 50 60 10 30 20 40 50 60 70 80 90 100 max3000e/01e/02-12 toc08 capacitive load (pf) rise/fall time (ns) max3001e rise/fall time vs. capacitive load on i/o v cc (driving i/o v l , v cc = 3.3v, v l = 1.8v) t hl t lh data rate = 4mbps 8 6 4 2 0 10 30 20 40 50 max3000e/01e/02-12 toc09 capacitive load (pf) rise/fall time (ns) max3002?ax3012 rise/fall time vs. capacitive load on i/o v cc (driving i/o v l , v cc = 3.3v, v l = 1.8v) t lh t hl data rate = 20mbps 0 500 1000 1500 2000 10 20 60 80 100 max3000e/01e/02-12 toc10 capacitive load (pf) rise/fall time (ns) max3000e rise/fall time vs. capacitive load on i/o v l (driving i/o v cc , v cc = 3.3v, v l = 1.8v) 30 40 50 70 90 t lh t hl data rate = 230kbps 0 10 20 30 40 50 60 10 30 20 40 50 60 70 80 90 100 max3000e/01e/02-12 toc11 capacitive load (pf) rise/fall time (ns) max3001e rise/fall time vs. capacitive load on i/o v l (driving i/o v cc , v cc = 3.3v, v l = 1.8v) t hl t lh data rate = 4mbps 4 3 2 1 0 10 20 15 25 30 max3000e/01e/02-12 toc12 capacitive load (pf) rise/fall time (ns) max3002?ax3012 rise/fall time vs. capacitive load on i/o v l (driving i/o v cc , v cc = 3.3v, v l = 1.8v) t lh t hl data rate = 20mbps 0 100 200 300 400 500 10 40 50 20 30 60 70 80 90 100 max3000e/01e/02-12 toc13 capacitive load (pf) propagation delay (ns) data rate = 230kbps t phl t plh max3000e propagation delay vs. capacitive load on i/o v cc (driving i/o v l , v cc = 3.3v, v l = 1.8v)
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators _______________________________________________________________________________________ 9 typical operating characteristics (continued) (t a = +25?, unless otherwise noted.) 0 100 200 300 400 500 600 10 30 20 40 50 60 70 80 90 100 max3000e/01e/02-12 toc16 capacitive load (pf) propagation delay (ns) max3000e propagation delay vs. capacitive load on i/o v l (driving i/o v cc , v cc = 3.3v, v l = 1.8v) t phl t plh data rate = 230kbps 0 3 9 6 12 15 max3000e/01e/02-12 toc17 capacitive load (pf) propagation delay (ns) 10 30 20 40 50 max3001e propagation delay vs. capacitive load on i/o v l (driving i/o v cc , v cc = 3.3v, v l = 1.8v) t plh t phl data rate = 4mbps 0 1 3 2 4 5 max3000e/01e/02-12 toc18 capacitive load (pf) propagation delay (ns) 10 20 15 25 30 max3002?ax3012 propagation delay vs. capacitive load on i/o v l (driving i/o v cc , v cc = 3.3v, v l = 1.8v) t plh t phl data rate = 20mbps 1 s max3000e rail-to-rail driving (driving i/o v l , v cc = 3.3v, v l = 1.8v, cv cc = 50pf, data rate = 230kbps) gnd i/o v l_ 1v/div gnd max3000e/01e/02-12 toc19 i/o v cc_ 2v/div 40ns max3001e rail-to-rail driving (driving i/o v l , v cc = 3.3v, v l = 1.8v, cv cc = 50pf, data rate = 4mbps) gnd i/o v l_ 1v/div gnd max3000e/01e/02-12 toc20 i/o v cc_ 2v/div 10ns max3002?ax3012 rail-to-rail driving (driving i/o v l , v cc = 3.3v, v l = 1.8v, cv cc = 50pf, data rate = 20mbps) gnd i/o v l_ 1v/div gnd max3000e/01e/02-12 toc21 i/o v cc_ 2v/div 0 10 5 20 15 25 30 10 30 20 40 50 max3000e/01e/02-12 toc14 capacitive load (pf) propagation delay (ns) max3001e propagation delay vs. capacitive load on i/o v cc (driving i/o v l , v cc = 3.3v, v l = 1.8v) t phl t plh data rate = 4mbps 0 4 2 8 6 10 12 10 20 15 25 30 max3000e/01e/02-12 toc15 capacitive load (pf) propagation delay (ns) max3002?ax3012 propagation delay vs. capacitive load on i/o v cc (driving i/o v l , v cc = 3.3v, v l = 1.8v) t phl t plh data rate = 20mbps
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators 10 ______________________________________________________________________________________ pin description pin tssop ucsp name function 1 b1 i/o v l 1 input/output 1, referenced to v l 2 a1 v l logic input voltage, +1.2v v l v cc . bypass v l to gnd with a 0.1? capacitor. 3 a2 i/o v l 2 input/output 2, referenced to v l 4 b2 i/o v l 3 input/output 3, referenced to v l 5 a3 i/o v l 4 input/output 4, referenced to v l 6 b3 i/o v l 5 input/output 5, referenced to v l 7 a4 i/o v l 6 input/output 6, referenced to v l 8 b4 i/o v l 7 input/output 7, referenced to v l 9 a5 i/o v l 8 input/output 8, referenced to v l 10 b5 en enable input. if en is pulled low, i/o v cc 1 to i/o v cc 8 are in three-state, while i/o v l 1 to i/o v l 8 have internal 6k ? pulldown resistors. drive en high (v l ) for normal operation. 11 c5 gnd ground 12 d5 i/o v cc 8 input/output 8, referenced to v cc 13 c4 i/o v cc 7 input/output 7, referenced to v cc 14 d4 i/o v cc 6 input/output 6, referenced to v cc 15 c3 i/o v cc 5 input/output 5, referenced to v cc 16 d3 i/o v cc 4 input/output 4, referenced to v cc 17 c2 i/o v cc 3 input/output 3, referenced to v cc 18 d2 i/o v cc 2 input/output 2, referenced to v cc 19 d1 v cc v cc input voltage, +1.65v v cc +5.5v. bypass v cc to gnd with a 0.1? capacitor. 20 c1 i/o v cc 1 input/output 1, referenced to v cc max3000e/max3001e/max3002
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators ______________________________________________________________________________________ 11 pin description (continued) pin tssop ucsp name function 1 b1 i/o v l 1a input/output 1a, referenced to v l 2 a1 v l logic input voltage, +1.2v v l v cc . bypass v l to gnd with a 0.1? capacitor. 3 a2 i/o v l 2a input/output 2a, referenced to v l 4 b2 i/o v l 3a input/output 3a, referenced to v l 5 a3 i/o v l 4a input/output 4a, referenced to v l 6 b3 i/o v l 1b input/output 1b, referenced to v l 7 a4 i/o v l 2b input/output 2b, referenced to v l 8 b4 i/o v l 3b input/output 3b, referenced to v l 9 a5 i/o v l 4b input/output 4b, referenced to v l 10 b5 en a/b e nab l e inp ut. if e n a/b i s p ul l ed l ow , channel s 1b thr oug h 4b ar e acti ve, and channel s 1a thr oug h 4a ar e i n thr ee- state. if e n a/b i s d r i ven hi g h to v l , channel s 1a thr oug h 4a ar e acti ve, and channel s 1b thr oug h 4b ar e i n thr ee- state. 11 c5 gnd ground 12 d5 i/o v cc 4b input/output 4b, referenced to v cc 13 c4 i/o v cc 3b input/output 3b, referenced to v cc 14 d4 i/o v cc 2b input/output 2b, referenced to v cc 15 c3 i/o v cc 1b input/output 1b, referenced to v cc 16 d3 i/o v cc 4a input/output 4a, referenced to v cc 17 c2 i/o v cc 3a input/output 3a, referenced to v cc 18 d2 i/o v cc 2a input/output 2a, referenced to v cc 19 d1 v cc v cc input voltage, +1.65v v cc +5.5v. bypass v cc to gnd with a 0.1? capacitor. 20 c1 i/o v cc 1a input/output 1a, referenced to v cc max3003
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators 12 ______________________________________________________________________________________ pin description (continued) name function (note 1) v cc v cc input voltage, +1.65v < v cc < +5.5v. bypass v cc to gnd with a 0.1? capacitor. v l logic input voltage, +1.2v v l v cc . bypass v l to gnd with a 0.1? capacitor. gnd ground en (max3004) enable input. if en is pulled low, ov cc 1?v cc 8 are in three-state, while iv l 1?v l 8 have 6k ? pulldown resistors. drive en high (v l ) for normal operation. en (max3005) enable input. if en is pulled low, iv cc 1 and ov cc 2?v cc 8 are in three-state, while ov l 1 and iv l 2?v l 8 have 6k ? pulldown resistors. drive en high (v l ) for normal operation. en (max3006) enable input. if en is pulled low, iv cc 1, iv cc 2, and ov cc 3?v cc 8 are in three-state, while ov l 1, ov l 2, and iv l 3?v l 8 have 6k ? pulldown resistors. drive en high (v l ) for normal operation. en (max3007) enable input. if en is pulled low, iv cc 1, iv cc 2, iv cc 3, and ov cc 4?v cc 8 are in three-state, while ov l 1, ov l 2, ov l 3, and iv l 4?v l 8 have 6k ? pulldown resistors. drive en high (v l ) for normal operation. en (max3008) enable input. if en is pulled low, iv cc 1?v cc 4 and ov cc 5?v cc 8 are in three-state, while ov l 1?v l 4 and iv l 5?v l 8 have 6k ? pulldown resistors. drive en high (v l ) for normal operation. en (max3009) enable input. if en is pulled low, iv cc 1?v cc 5, ov cc 6, ov cc 7, and ov cc 8 are in three-state, while ov l 1?v l 5, iv l 6, iv l 7, and iv l 8 have 6k ? pulldown resistors. drive en high (v l ) for normal operation. en (max3010) enable input. if en is pulled low, iv cc 1?v cc 6, ov cc 7, and ov cc 8 are in three-state, while ov l 1?v l 6, iv l 7, and iv l 8 have 6k ? pulldown resistors. drive en high (v l ) for normal operation. en (max3011) enable input. if en is pulled low, iv cc 1?v cc 7 and ov cc 8 are in three-state, while ov l 1?v l 7 and iv l 8 have 6k ? pulldown resistors. drive en high (v l ) for normal operation. en (max3012) enable input. if en is pulled low, iv cc 1?v cc 8 are in three-state, while ov l 1?v l 8 have 6k ? pulldown resistors. drive en high (v l ) for normal operation. iv l 1?v l 8 inputs referenced to v l , numbers 1 to 8 ov l 1?v l 8 outputs referenced to v l , numbers 1 to 8 iv cc 1?v cc 8 inputs referenced to v cc , numbers 1 to 8 ov cc 1?v cc 8 outputs referenced to v cc , numbers 1 to 8 max3004?ax3012 note 1: for specific pin numbers, see the pin configurations .
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators ______________________________________________________________________________________ 13 ______________________________________________ test circuits/timing diagrams max3000e/max3001e/ max3002/max3003 source r s i/o v l en v l v cc i/o v cc c vcc i/o vl-vcc i/o vl-vcc i/o v cc i/o v l 90% 50% 10% 90% 50% 10% t rise/fall 3ns t fvcc t rvcc source r s i/o v l en v l v cc i/o v cc c vl max3000e/max3001e/ max3002/max3003 i/o vcc-vl i/o vcc-vl i/o v l i/o v cc 90% 50% 10% 90% 50% 10% t rise/fall 3ns t fvl t rvl figure 1a. driving i/o v l figure 1b. timing for driving i/o v l figure 2a. driving i/o v cc figure 2b. timing for driving i/o v cc
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators 14 ______________________________________________________________________________________ _________________________________ test circuits/timing diagrams (continued) source en i/o v cc i/o v l c vcc v l en i/o v l i/o v cc t' en-vcc v l v l v cc 0 0 source en i/o v cc i/o v l c vcc v l en i/o v l i/o v cc v cc 2 t" en-vcc v l v l v cc 0 0 0 t en-vcc is whichever is larger between t' en-vcc and t" en-vcc max3000e/max3001e/ max3002/max3003 max3000e/max3001e/ max3002/max3003 v cc 2 figure 3. propagation delay from i/o v l to i/o v cc after en source en i/o v cc i/o v l c vl v cc en i/o v l i/o v cc t' en-vl v l v l v cc 0 0 0 source en i/o v cc i/o v l c vl v cc en i/o v l i/o v cc t" en-vl v l v l v cc 0 0 0 t en-vl is whichever is larger between t' en-vl and t" en-vl max3000e/max3001e/ max3002/max3003 max3000e/max3001e/ max3002/max3003 v l 2 v l 2 figure 4. propagation delay from i/o v cc to i/o v l after en
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators ______________________________________________________________________________________ 15 detailed description the max3000e/max3001e/max3002?ax3012 logic- level translators provide the level shifting necessary to allow data transfer in a multivoltage system. externally applied voltages, v cc and v l , set the logic levels on either side of the device. logic signals present on the v l side of the device appear as a higher voltage logic signal on the v cc side of the device, and vice-versa. the max3000e/max3001e/max3002/max3003 are bidirectional level translators allowing data translation in either direction (v l ? v cc ) on any single data line. these devices use an architecture specifically designed to be bidirectional without the use of a direc- tion pin. the max3004?ax3012 unidirectional level translators level shift data in one direction (v l v cc or v cc v l ) on any single data line. the max3000e/max3001e/ max3002?ax3012 accept v l from +1.2v to +5.5v. all devices have v cc ranging from +1.65v to +5.5v, making them ideal for data trans- fer between low-voltage asics/plds and higher volt- age systems. the max3000e/max3001e/max3002/max3004 max3012 feature an output enable mode that reduces v cc supply current to less than 2?, and v l supply current to less than 2? when in shutdown. the max3000e/max3001e have ?5kv esd protection on the v cc side for greater protection in applications that route signals externally. the max3000e operates at a guaranteed data rate of 230kbps; the max3001e oper- ates at a guaranteed data rate of 4mbps and the max3002?ax3012 are guaranteed with a data rate of 20mbps of operation over the entire specified operating voltage range. level translation for proper operation, ensure that +1.65v v cc +5.5v, +1.2v v l +5.5v, and v l v cc . during power-up sequencing, v l v cc does not damage the device. during power-supply sequencing, when v cc is floating and v l is powering up, up to 10ma current can be sourced to each load on the v l side, yet the device does not latch up. the maximum data rate also depends heavily on the load capacitance (see the typical operating characteristics ), output impedance of the driver, and the operational voltage range (see the timing characteristics ). input driver requirements the max3001e/max3002?ax3012 architecture is based on a one-shot accelerator output stage. see figure 5. accelerator output stages are always in three- state except when there is a transition on any of the translators on the input side, either i/o v l or i/o v cc . when there is such a transition, the accelerator stages become active, charging (discharging) the capacitances at the i/os. due to its bidirectional nature, both stages become active during the one-shot pulse. this can lead to some current feeding into the external source that is driving the translator. however, this behavior helps to speed up the transition on the driven side. for proper full-speed operation, the output current of a device that drives the inputs of the max3000e, max3001e, max3002?ax3012 should meet the fol- lowing requirements: max3000e (230kbps): i>1ma, r drv <1k ? max3001e (4mbps): i>10 7 x v x (c+10pf) max3002?ax3012 (20mbps): i>10 8 x v x (c + 10pf) where, i is the driver output current, v is the logic-sup- ply voltage (i.e., v l or v cc ) and c is the parasitic capacitance of the signal line. enable output mode (en, en a/b) the max3000e/max3001e/max3002 and the max3004 max3012 feature an en input, and the max3003 has an en a/b input. pull en low to set the max3000e/ max3001e/max3002/max3004?ax3012s?i/o v cc 1 through i/o v cc 8 in three-state output mode, while i/o v l 1 through i/o v l 8 have internal 6k ? pulldown resis- tors. drive en to logic high (v l ) for normal operation. the max3003 is intended for bus multiplexing or bus switch- ing applications. drive en a/b low to place channels 1b through 4b in active mode, while channels 1a through 4a are in three-state mode. drive en a/b to logic high (v l ) to enable channels 1a through 4a, while channels 1b through 4b remain in three-state mode. ?5kv esd protection as with all maxim devices, esd-protection structures are incorporated on all pins to protect against electro- static discharges encountered during handling and assembly. the i/o v cc lines have extra protection against static discharge. maxim? engineers have developed state-of-the-art structures to protect these pins against esd of ?5kv without damage. the esd structures withstand high esd in all states: normal operation, three-state output mode, and powered down. after an esd event, maxim? e versions keep working without latchup, whereas competing products
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators 16 ______________________________________________________________________________________ can latch and must be powered down to remove latchup. esd protection can be tested in various ways. the i/o v cc lines of the max3000e/max3001e are char- acterized for protection to ?5kv using the human body model. esd test conditions esd performance depends on a variety of conditions. contact maxim for a reliability report that documents test setup, test methodology, and test results. human body model figure 7a shows the human body model and figure 7b shows the current waveform it generates when dis- charged into a low impedance. this model consists of a 100pf capacitor charged to the esd voltage of inter- est, which is then discharged into the test device through a 1.5k ? resistor. machine model the machine model for esd tests all pins using a 200pf storage capacitor and zero discharge resis- tance. its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. of course, all pins require this protec- tion during manufacturing, not just inputs and outputs. therefore, after pc board assembly, the machine model is less relevant to i/o ports. p one-shot v cc v l i/o v l i/o v cc 6k ? 6k ? i/o v cc_ to i/o v l_ path i/o v l_ to i/o v cc_ path n one-shot p one-shot n one-shot figure 5. max3001e/max3002?ax3012 simplified functional diagram (1 i/o line) 0 v th_in /6k ? -(v s - v th_in )/6k ? i in v th_in v s v in where v s = v cc or v l figure 6. typical i in vs. v in
applications information power-supply decoupling to reduce ripple and the chance of transmitting incor- rect data, bypass v l and v cc to ground with a 0.1? capacitor. to ensure full ?5kv esd protection, bypass v cc to ground with a 1? capacitor. place all capaci- tors as close to the power-supply inputs as possible. i 2 c level translation for i 2 c level translation for i 2 c applications, please refer to the max3372e?ax3379e/max3390e?ax3393e datasheet. unidirectional vs. bidirectional level translator the max3000e/max3001e/max3002/max3003 bidi- rectional translators can operate as a unidirectional device to translate signals without inversion. the max3004-max3012 unidirecitional level translators, level shift data in one direction (v l v cc or v cc vl) on any single data line (see ordering information.) these devices provide the smallest solution (ucsp package) for unidirectional level translation without inversion. max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators ______________________________________________________________________________________ 17
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators 18 ______________________________________________________________________________________ high- voltage dc source device under test r c 1m ? r d 1500 ? charge-current- limit resistor discharge resistance storage capacitor c s 100pf figure 7a. human body esd test model 100% 90% 36.8% t rl t dl time current waveform peak-to-peak ringing (not drawn to scale) 10% 0 0 amperes i p i r figure 7b. human body current waveform part en en a/b tx/rx* data rate esd protection (kv) max3000e 8/8 230kbps ? 15 max3001e 8/8 4mbps ? 15 max3002 8/8 ** ? 2 max3003 8/8 ** ? 2 max3004 8/0 ** ? 2 max3005 7/1 ** ? 2 max3006 6/2 ** ? 2 max3007 5/3 ** ? 2 max3008 4/4 ** ? 2 max3009 3/5 ** ? 2 max3010 2/6 ** ? 2 max3011 1/7 ** ? 2 max3012 0/8 ** ? 2 selector guide * t x = v l v cc ; r x = v cc v l ** see table 1. v l ? v cc (v) max3002?ax3012 guaranteed data rate (mbps) 1.2 ? 5.5 40 1.2 ? 3.3 20 2.5 ? 3.3 35 1.8 ? 2.5 30 1.2 ? 2.5 20 1.2 ? 1.8 20 table 1. data rate
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators ______________________________________________________________________________________ 19 max3000e/ max3001e/max3002 v l v cc en i/o v l 1 i/o v l 2 i/o v l 3 i/o v l 4 i/o v l 5 i/o v l 6 i/o v l 7 i/o v l 8 i/o v cc 8 i/o v cc 7 i/o v cc 6 i/o v cc 5 i/o v cc 4 i/o v cc 3 i/o v cc 2 i/o v cc 1 gnd max3000e/max3001e/max3002 functional diagram
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators 20 ______________________________________________________________________________________ max3003 v l v cc en a/b i/o v l 1a i/o v l 2a i/o v l 3a i/o v l 4a i/o v l 1b i/o v l 2b i/o v l 3b i/o v l 4b i/o v cc 4b i/o v cc 3b i/o v cc 2b i/o v cc 1b i/o v cc 4a i/o v cc 3a i/o v cc 2a i/o v cc 1a gnd max3003 functional diagram
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators ______________________________________________________________________________________ 21 max3000e/max3001e/max3002 max3004?ax3012 20 ucsp (bottom view) max3003 20 ucsp (bottom view) i/o v cc 2 v cc i/o v cc 4 i/o v cc 6 i/o v cc 3 i/o v cc 1 i/o v cc 5 i/o v cc 7 i/o v l 3 i/o v l 1 i/o v l 5 i/o v l 7 i/o v l 2 v l i/o v l 4 i/o v l 6 i/o v cc 8 gnd en i/o v l 8 1 b a c d 2345 i/o v cc 4a v cc i/o v cc 2b i/o v cc 4b i/o v cc 1b i/o v cc 1a i/o v cc 3b gnd i/o v l 1b i/o v l 1a i/o v l 3b en a/b i/o v l 4a v l i/o v l 2b i/o v l 4b i/o v cc 2a i/o v cc 3a i/o v l 3a i/o v l 2a 1 b a c d 345 2 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 v l i/o v l 1 i/o v l 2 i/o v l 3 i/o v l 4 i/o v l 5 i/o v l 6 i/o v l 7 i/o v l 8 en top view 12 11 9 10 i/o v cc 8 i/o v cc 7 i/o v cc 6 i/o v cc 5 i/o v cc 4 i/o v cc 3 i/o v cc 2 v cc i/o v cc 1 gnd max3000e/max3001e/ max3002 tssop 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 v l i/o v l 1a i/o v l 2a i/o v l 3a i/o v l 4a i/o v l 1b i/o v l 2b i/o v l 3b i/o v l 4b en a/b 12 11 9 10 i/o v cc 4b i/o v cc 3b i/o v cc 2b i/o v cc 1b i/o v cc 4a i/o v cc 3a i/o v cc 2a v cc i/o v cc 1a gnd max3003 tssop pin configurations
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators 22 ______________________________________________________________________________________ 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 v l i v l 1 i v l 2 i v l 3 i v l 4 i v l 5 i v l 6 i v l 7 i v l 8 en top view 12 11 9 10 o v cc 8 o v cc 7 o v cc 6 o v cc 5 o v cc 4 o v cc 3 o v cc 2 v cc o v cc 1 gnd max3004 tssop 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 v l o v l 1 i v l 2 i v l 3 i v l 4 i v l 5 i v l 6 i v l 7 i v l 8 en 12 11 9 10 o v cc 8 o v cc 7 o v cc 6 o v cc 5 o v cc 4 o v cc 3 o v cc 2 v cc i v cc 1 gnd max3005 tssop 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 v l o v l 1 o v l 2 i v l 3 i v l 4 i v l 5 i v l 6 i v l 7 i v l 8 en 12 11 9 10 o v cc 8 o v cc 7 o v cc 6 o v cc 5 o v cc 4 o v cc 3 i v cc 2 v cc i v cc 1 gnd max3006 tssop 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 v l o v l 1 o v l 2 o v l 3 i v l 4 i v l 5 i v l 6 i v l 7 i v l 8 en 12 11 9 10 o v cc 8 o v cc 7 o v cc 6 o v cc 5 o v cc 4 i v cc 3 i v cc 2 v cc i v cc 1 gnd max3007 tssop 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 v l o v l 1 o v l 2 o v l 3 o v l 4 i v l 5 i v l 6 i v l 7 i v l 8 en 12 11 9 10 o v cc 8 o v cc 7 o v cc 6 o v cc 5 i v cc 4 i v cc 3 i v cc 2 v cc i v cc 1 gnd max3008 tssop 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 v l o v l 1 o v l 2 o v l 3 o v l 4 o v l 5 i v l 6 i v l 7 i v l 8 en 12 11 9 10 o v cc 8 o v cc 7 o v cc 6 i v cc 5 i v cc 4 i v cc 3 i v cc 2 v cc i v cc 1 gnd max3009 tssop pin configurations (continued)
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators ______________________________________________________________________________________ 23 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 v l o v l 1 o v l 2 o v l 3 o v l 4 o v l 5 o v l 6 i v l 7 i v l 8 en 12 11 9 10 o v cc 8 o v cc 7 i v cc 6 i v cc 5 i v cc 4 i v cc 3 i v cc 2 v cc i v cc 1 gnd max3010 tssop 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 v l o v l 1 o v l 2 o v l 3 o v l 4 o v l 5 o v l 6 o v l 7 i v l 8 en 12 11 9 10 o v cc 8 i v cc 7 i v cc 6 i v cc 5 i v cc 4 i v cc 3 i v cc 2 v cc i v cc 1 gnd max3011 tssop 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 v l o v l 1 o v l 2 o v l 3 o v l 4 o v l 5 o v l 6 o v l 7 o v l 8 en 12 11 9 10 i v cc 8 i v cc 7 i v cc 6 i v cc 5 i v cc 4 i v cc 3 i v cc 2 v cc i v cc 1 gnd max3012 tssop top view pin configurations (continued) chip information transistor count: 1184 process: bicmos ordering information (continued) part temp range pin-package max3001e eup -40? to +85? 20 tssop max3001eebp-t* -40? to +85? 4 x 5 ucsp max3001eaup -40? to +125? 20 tssop max3002 eup -40? to +85? 20 tssop MAX3002Ebp-t* -40? to +85? 4 x 5 ucsp max3003 eup -40? to +85? 20 tssop max3003ebp-t* -40? to +85? 4 x 5 ucsp max3004 eup* -40? to +85? 20 tssop max3004ebp-t* -40? to +85? 4 x 5 ucsp max3005 eup* -40? to +85? 20 tssop max3005ebp-t* -40? to +85? 4 x 5 ucsp max3006 eup* -40? to +85? 20 tssop max3006ebp-t* -40? to +85? 4 x 5 ucsp part temp range pin-package max3007 eup* -40? to +85? 20 tssop max3007ebp-t* -40? to +85? 4 x 5 ucsp max3008 eup* -40? to +85? 20 tssop max3008ebp-t* -40? to +85? 4 x 5 ucsp max3009 eup* -40? to +85? 20 tssop max3009ebp-t* -40? to +85? 4 x 5 ucsp max3010 eup* -40? to +85? 20 tssop max3010ebp-t* -40? to +85? 4 x 5 ucsp max3011 eup* -40? to +85? 20 tssop max3011ebp-t* -40? to +85? 4 x 5 ucsp max3012 eup* -40? to +85? 20 tssop max3012ebp-t* -40? to +85? 4 x 5 ucsp * future product?ontact factory for availability.
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators 24 ______________________________________________________________________________________ 5x4 ucsp.eps i 1 1 21-0095 package outline, 5x4 ucsp package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)
max3000e/max3001e/max3002?ax3012 +1.2v to +5.5v, ?5kv esd-protected, 0.1?, 35mbps, 8-channel level translators maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 25 2005 maxim integrated products printed usa is a registered trademark of maxim integrated products, inc. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) tssop4.40mm.eps

▲Up To Search▲

Price & Availability of MAX3002E

	To Download MAX3002E Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .